1. Technical Field
The present disclosure relates to a display device, and more particularly, to a display device which is performing bidirectional data communication between a timing controller and a source driver.
2. Related Art
In general, a display device may include a display panel having a plurality of gate lines and a plurality of source lines, a gate driver for supplying a gate driving signal to the plurality of gate lines, a source driver for supplying a source driving signal to the plurality of source lines, and a timing controller for transmitting a data signal to the source driver.
In such a display device, the timing controller needs to transmit a data signal to the source driver at high speed.
For this operation, the display device may use various interfaces. For example, the timing controller provides a data signal in which a clock signal is embedded through CEDS (Clock Embedded Differential Signaling), to the source driver.
In the interface environment based on the CEDS, the source driver receives a transmit (Tx) signal transmitted from the timing controller through a transmission line, recovers a clock signal CLK and a data signal from the Tx signal, processes the data signal using the recovered clock signal, and outputs the processed signal as a source driving signal.
In the case of a display device using an organic light emitting diode (OLED), a source driver may include a plurality of sample and hold (S/H) circuits for sensing the changes in pixel information of a plurality of pixels included in a display panel.
The S/H circuit senses pixel information of an output channel of the source driver. The pixel information sensed through the S/H circuit is converted into correction data as a digital signal by an analog-digital converter (ADC), and then provided to a timing controller.
The timing controller may use the pixel information sensed through the S/H circuit, that is, the correction data in order to correct an image.
In the conventional display device, a plurality of source drivers share a pair of bus lines, and provide the correction data to the timing controller through the shared bus lines.
In the conventional display device, impedance mismatching easily occurs because the plurality of source drivers share the pair of bus lines. Furthermore, since one source driver exclusively occupies the pair of bus lines when transmitting pixel information, the plurality of source drivers need to sequentially transmit pixel information. As a result, precise timing alignment is required for each of the source drivers to secure a transmission period.